64 Bit SRAM Design using 5T and a Comparative Study between 6T and 5T Designs


64 Bit SRAM Design using 5T and a Comparative Study between 6T and 5T Designs

Nitin Tiwari, Amit Mishra

Nitin Tiwari, Amit Mishra "64 Bit SRAM Design using 5T and a Comparative Study between 6T and 5T Designs" Published in International Journal of Trend in Research and Development (IJTRD), ISSN: 2394-9333, Volume-4 | Issue-1 , February 2017, URL: http://www.ijtrd.com/papers/IJTRD6531.pdf

The main goals of NLSI Designer are to reduce the area, improve performance and decreasing the cost. There are several sources for the leakage current, i.e. low threshold voltage causes to sub-threshold current, very thin gate oxides cause to gate leakage, and heavily-doped halo doping profile causes to band-to-band tunneling leakage. It is seemed that we have to focus to minimize the leakage power in the number of transistors and the large memory substance of future SoC (System on Chip) devices.

Memory, Tunneling Leakage, Systems-On-Chip, Leakage Power Consumption.


Volume-4 | Issue-1 , February 2017

2394-9333

IJTRD6531
pompy wtryskowe|cheap huarache shoes| cheap jordans|cheap jordans|cheap air max| cheap sneaker cheap nfl jerseys|cheap air jordanscheap jordan shoes
cheap wholesale jordans